基于FPGA的多轴直流电机控制系统

周磊; 王邦继; 刘庆想; 李相强; 张健穹

doi:10.11884/HPLPB201830.170188

基于FPGA的多轴直流电机控制系统

doi: 10.11884/HPLPB201830.170188

西南交通大学物理科学与技术学院, 成都 610031

基金项目: 国家高技术发展计划项目

详细信息

作者简介:
周磊(1988-), 男，博士研究生，主要从事电机驱动与控制技术研究；libaozhoulei@163.com

通讯作者:
王邦继(1984-), 男，博士，讲师，主要从事相控阵天线波束控制技术研究；bangjiw@163.com

中图分类号: TP271
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出版历程
- 收稿日期: 2017-05-27
- 修回日期: 2017-09-18
- 刊出日期: 2018-01-15

Multi-axis DC motor controller for phased array antenna applications implemented on FPGA

College of Physical Science and Technology, Southwest Jiaotong University, Chengdu 610031, China

摘要

摘要: 为了实现机械相控阵列天线的波束扫描，采用微型直流电机驱动螺旋天线单元转动来达到预定的辐射相位，研究了一种基于单片FPGA的多轴直流电机控制系统。采用IP设计思想，直流电机的位置控制用纯硬件逻辑电路的形式(直流电机控制IP核)实现，总线通信及轨迹计算由同一芯片上的微处理器(Nios II软核)软件实现，从而容易构建多轴直流电机控制的片上系统。利用Verilog硬件描述语言，设计了一种高性能直流电机控制IP核，并进行了仿真验证。为了验证该IP核的复用性，构建了一个56轴直流电机控制的片上系统。实验结果表明，此系统可对各个直流电机实现快速精确控制，每轴的运动相互独立，并且控制参数在线可编程，控制一致性满足系统设计要求。基于这种方式构建的系统，扩展方便、可移植性高、具有较好的适用性，已在某相控阵列天线中得到了应用。
- 机械相控阵列天线 /
- 直流电机 /
- 控制器IP核 /
- 多轴运动
Abstract: In order to achieve beam steering of mechanical phased array antenna, the brushed direct current motor(BDCM) is adopted to drive a helical antenna element to rotate to a predetermined radiation. The design and implementation of a multi-axis BDCM controller using a field programmable gate array (FPGA) is studied. Based on IP core design methodology, the flexibility of the system on a Programmable Chip(SoPC) in multiple-axis BDCM controller enables the processing of the most position servo control operations by hardware(BDCM controller IP core) and the trajectory computation and communication operations by software (Nios II microprocessor) in the same device. A high performance BDCM controller IP core described in Verilog HDL is designed, and simulation is fulfilled. The reusability of the IP core is demonstrated with the design of a 56 axis SoPC system. The experimental results show that the system can realize high precision control of the 56 axis BDCM, each axis is independent of the others, all parameters are programmable online, and consistency meets the system requirement. The built-up system based on this mode has many advantages, such as easy expansion, high portability and broad applicability. It has been applied to a phased array antenna.
- phased array antenna /
- brushed DC motor /
- motor controller IP core /
- multi-axis motion

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图 1 直流电机控制IP核

Figure 1. Direct current motor controller IP core

下载: 全尺寸图片幻灯片

图 2 QEP电路框图

Figure 2. Block diagram of QEP circuit

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图 3 PID控制模块结构框图

Figure 3. Block diagram of PID block

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图 4 直流电机控制IP核仿真波形

Figure 4. Simulink results of DC motor controller IP core

下载: 全尺寸图片幻灯片

图 5 56轴直流电机控制的片上系统框图

Figure 5. SoPC system diagram of 56-axis direct current motor controller

下载: 全尺寸图片幻灯片

图 6 任一轴直流电机的位置阶跃响应

Figure 6. Response for step position command of any DC motor

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图 7 电机控制器输出的任一轴调制信号和方向信号

Figure 7. Any modulation and direction signal of motor controller

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图 8 56轴直流电机的位置阶段响应曲线

Figure 8. Position profile of 56-axis DC motor

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表 1 寄存器和接口映像

Table 1. Registers and interface image

register	offset	width	bits	description	register	offset	width	bits	description
			[0]	reset	para_reg1	0×03	32	[15∶0]	k_p of PID
control_reg	0×00	32	[1]	enable	para_reg2	0×04	32	[15∶0]	k_i of PID
			[2]	brake	para_reg3	0×05	32	[15∶0]	k_d of PID
data_reg1	0×01	32	[15∶0]	set position	para_reg4	0×06	32	[15∶0]	limit of integration
data_reg2	0×02	32	[15∶0]	actual position	para_reg5	0×07	32	[15∶0]	limit of output

下载: 导出CSV

表 2 56轴直流电机控制的SoPC系统执行结果

Table 2. Implementation results of 56-axis direct current motor controller SoPC system

hardware resource	logic resource (in ALMs)	DSP modules	M10K RAM block	PLL	clock frequency
usage amount	45 011/56 480	116/156	4 185/6 860	1/7	123 MHz
usage rate	80%	72%	61%	14%	-

下载: 导出CSV

参考文献(15)

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