基于FPGA的高分辨率数字时间转换器

王伟; 张瑞峰

doi:10.11884/HPLPB202335.220072

基于FPGA的高分辨率数字时间转换器

doi: 10.11884/HPLPB202335.220072

王伟,
张瑞峰

天津大学微电子学院，天津 300072

详细信息

作者简介:
王　伟，2020232120@tju.edu.cn

中图分类号: TN492
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出版历程
- 收稿日期: 2022-03-15
- 修回日期: 2022-11-10
- 网络出版日期: 2022-11-09
- 刊出日期: 2023-03-01

High resolution digital-to-time converter based on FPGA

School of Microelectronics, Tianjin University, Tianjin 300072, China

摘要

摘要: 针对全固态直线变压器驱动源（LTD）中大规模开关同步触发的需求，基于游标法和预相移技术设计了一种全新的双通道同步高分辨率数字时间转换器（DTC）。在原有游标DTC的基础上提前计算不同生成脉冲相位重合位置的关系，通过相位移动和相位检测使时钟信号提前满足相位关系，以实现同时触发多个不同宽度脉冲信号的目的。详细阐述了DTC的实现原理和电路设计模块，并对其进行了仿真和现场可编程门阵列（FPGA）实现，同时对实现结果进行测试、分析和讨论。在Xilinx ARTIX-7 FPGA开发板上实现了第一个脉冲信号的分辨率为0.85 ps，微分非线性（DNL）和积分非线性（INL）分别为−1.255～1.166 LSB和−7.33～7.05 LSB。第二个脉冲信号分辨率为17.1131 ps， DNL和INL分别为−0.0987～0.105 LSB和−0.717～0.735 LSB, 且在0～80 ℃的环境温度中依旧可以保证DTC的性能。结果表明此DTC具有实现简单、成本低，性能高效等优点。
- 数字时间转换器 /
- 游标法 /
- 预相移 /
- 模式时钟管理器 /
- 同步触发
Abstract: Aiming at the requirement of large-scale switch synchronous triggering in all-solid-state linear transformer driver (LTD), this paper designs a new dual-channel synchronous high-resolution digital-to-time converter (DTC) based on the vernier method and pre-phase shift technology. On the basis of the original vernier DTC, the relationship between the overlapping positions of different generated pulse phases is calculated in advance, and the clock signal meets the phase relationship in advance through phase shift and phase detection, so as to achieve the purpose of triggering multiple pulse signals of different widths at the same time. The realization principle and circuit design module of DTC are expounded in detail, and the simulation and Field Programmable Gate Array (FPGA) realization are carried out. At the same time, the realization result is tested, analyzed and discussed. On the Xilinx ARTIX-7 FPGA development board, the resolution of the first pulse signal is 0.85 ps, and the differential nonlinearity (DNL) and integral nonlinearity (INL) are −2.55～2.17 LSB and −7.33～7.05 LSB, respectively. The resolution of the second pulse signal is 17.1131 ps, DNL and INL are −0.005～0.0105 LSB and −0.299～0.288 LSB respectively, and the performance of DTC can still be guaranteed in the ambient temperature of 0～80 ℃. The results show that this DTC has the advantages of simple implementation, low cost and high performance.
- digital-to-time converter /
- vernier method /
- pre-phase shift /
- MMCM /
- synchronous trigger

HTML全文

图 1 游标DTC的时序图

Figure 1. Timing diagram of the vernier DTC

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图 2 当β₁≥β₂时的时序图

Figure 2. Timing diagrams when β₁≥β₂

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图 3 当β₁＜β₂时的时序图

Figure 3. Timing diagrams when β₁＜β₂

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图 4 游标DTC的简化框图

Figure 4. Simplified block diagram of the vernier DTC

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图 5 相位检测电路

Figure 5. Circuit schematic of the phase coincidence detector

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图 6 β₁≥β₂时的脉冲生成器结构图

Figure 6. Schematic of the pulse generator when β₁≥β₂

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图 7 β₁＜β₂时的脉冲生成器结构图

Figure 7. Schematic of the pulse generator when β₁＜β₂

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图 8 MMCM原理图

Figure 8. Schematic of MMCM

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图 9 不同β₁和β₂的仿真结果

Figure 9. Simulation results of different sizes of β₁ and β₂

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图 10 第一个脉冲信号的微分非线性度和积分非线性度

Figure 10. DNL and INL of the first pulse signal

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图 11 第二个脉冲信号的微分非线性度和积分非线性度

Figure 11. DNL and INL of the second pulse signal

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图 12 DTC的温度敏感性

Figure 12. Temperature sensitivity of the DTC

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