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基于对差分结构的320 GHz三倍频器

张筱健 蒋均 田遥岭 杨昊 何月 李若雪 刘戈

张筱健, 蒋均, 田遥岭, 等. 基于对差分结构的320 GHz三倍频器[J]. 强激光与粒子束, 2024, 36: 083005. doi: 10.11884/HPLPB202436.240118
引用本文: 张筱健, 蒋均, 田遥岭, 等. 基于对差分结构的320 GHz三倍频器[J]. 强激光与粒子束, 2024, 36: 083005. doi: 10.11884/HPLPB202436.240118
Zhang Xiaojian, Jiang Jun, Tian Yaoling, et al. A 320 GHz frequency tripler based on face-to-face differential structure[J]. High Power Laser and Particle Beams, 2024, 36: 083005. doi: 10.11884/HPLPB202436.240118
Citation: Zhang Xiaojian, Jiang Jun, Tian Yaoling, et al. A 320 GHz frequency tripler based on face-to-face differential structure[J]. High Power Laser and Particle Beams, 2024, 36: 083005. doi: 10.11884/HPLPB202436.240118

基于对差分结构的320 GHz三倍频器

doi: 10.11884/HPLPB202436.240118
基金项目: 国家重点研发计划项目(2023YFB3207800);中国工程物理研究院院长基金项目(YZJJZC2022001)
详细信息
    作者简介:

    张筱健,18303049879@163.com

    通讯作者:

    蒋 均,jiangjun@mtrc.ac.cn

  • 中图分类号: TN771

A 320 GHz frequency tripler based on face-to-face differential structure

  • 摘要: 结合高频特性下肖特基二极管有源区电气模型建模方法,实现了一种基于对差分结构的320 GHz三倍频器,相比于传统的平衡式和非平衡式电路,这种结构可以在降低工艺复杂度的同时使电路的功率容量增加一倍,更好地满足现代通信系统对大功率太赫兹频率源的需求。为了提高电路在高耗散功率下的仿真精度,使用符号定义器件在电路仿真软件中建立起新型的电-热自适应模型,最后按照场路结合的迭代方式完成整体电路设计。测试结果表明设计的三倍频器在123~200 mW的驱动功率下可以实现最高8.8%的转换效率,最大输出功率为17.27 mW;在305~384 mW的驱动功率下可以实现最高7.2%的转换效率,最大输出功率为27.33 mW,为高功率太赫兹器件的高效设计提供了有益借鉴。
  • 图  1  不同的平衡式倍频电路结构

    Figure  1.  Block diagram of different balanced tripler

    图  2  320GHz三倍频器的肖特基二极管模型及其核心电路

    Figure  2.  Schottky barrier diode model and the core circuit of the 320GHz balanced tripler

    图  3  直流低通滤波器结构及其仿真结果

    Figure  3.  Structure and simulation result of the DC lowpass filter

    图  4  E面Y型波导及其幅相特性

    Figure  4.  E-plane Y-junction waveguide and its amplitude and phase properties

    图  5  对称性E面探针结构及其嵌入阻抗性能

    Figure  5.  Structure and embedded impedance performance of symmetrical E-plane probe

    图  6  E面T型差分合成探针结构及其相位仿真性能

    Figure  6.  E-plane T-probe-based differential combining structure with related phase performance

    图  7  对差分式三倍频电路整体结构

    Figure  7.  Complete architecture of the tripler based on the face-to-face differential structure

    图  8  装配模块外部结构及其下腔体装配细节

    Figure  8.  External structure and lower cavity assembly details of the fabricated module

    图  9  倍频器测试框图

    Figure  9.  Measurement setup of the tripler

    图  10  输入功率曲线以及在不同输入功率、不同偏置电压下的测试结果

    Figure  10.  Input power curves and measurement results in different input power and bias

    表  1  倍频器性能比较

    Table  1.   Tripler performance comparison

    tripler balanced or not frequency/GHz peak power/mW efficiency/%
    Ref.[17] yes 265~296 21.0 7.0~12.5
    Ref.[18] yes 265~330 26.0 5.0~15.0
    Ref.[19] yes 89~94 25.0 5.0~25.0
    Ref.[20] no 330~356 11.2 4.2~5.3
    this work yes 307~333 27.3 4.0~7.2
    下载: 导出CSV
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    [16] Tian Yaoling, Huang Kun, He Yue, et al. A novel balanced frequency tripler with improved power capacity for submillimeter-wave application[J]. IEEE Microwave and Wireless Components Letters, 2021, 31(8): 925-928. doi: 10.1109/LMWC.2021.3084622
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出版历程
  • 收稿日期:  2024-04-07
  • 修回日期:  2024-05-31
  • 录用日期:  2024-05-31
  • 网络出版日期:  2024-06-12
  • 刊出日期:  2024-07-04

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