Digital RF phase control loop at rapid cycling synchrotron of China spallation neutron source

The RF phase control loop of the rapid cycling synchrotron (RCS) of China spallation neutron source (CSNS) is designed with an FPGA-based digitalized control system. It should be able to control the RF phase to follow the beam synchronous phase when the RF frequency is rapidly sweeping during the acceleration, which is important for the rapid acceleration and the stabilization of the beam during the acceleration cycle and for the minimization of the beam loss level. This paper presents the design and the experiments of the phase control loop system which uses an FPGA development board from ALTERA Co.. Both the desk experiments and the low-power ones with an assembled RF system show that, the phase control loop can run stably with the control error smaller than 1°, satisfying the design re